1. Field of the Invention
The field of the invention is data processing, or, more specifically, methods, circuits, and products for dynamically optimizing bus frequency of an Inter-Integrated Circuit (‘I2C’) bus.
2. Description of Related Art
The Inter-Integrated Circuit (‘I2C’) data communications interface and protocol is used widely throughout computing and electronic systems for various reasons including the robustness and stability of the protocol. The protocol, however, does have a few limitations. Like most electrical interfaces, devices employing I2C may be required to meet certain signal-integrity metrics to operate properly. Most notably, in I2C, is the rise time which the bus must meet. Because the bus is an open drain bus, meaning no active drivers, loading the bus with more devices generates a design concern as the rise time of the bus will be adversely impacted. Designers are often trying to balance the need for bandwidth of the bus versus a required rise time, such as that defined in the I2C specification. Usually, one bus speed does not fit all applications. To date, there is no I2C capable of dynamically finding an optimal clock frequency, based on bus load.